马来亚大学WONG YEW HOONG教授讲座
应材料科学与工程学院张墅野副教授的邀请，马来亚大学WONG YEW HOONG教授于2025年10月23日举行学术讲座，题目为“Development of Semiconductor Packaging Materials for High-Temperature Applications”和“High-k Rare Earth Oxides for Advanced Ge-Based MOS Devices in Wafer-Level Packaging”，欢迎感兴趣的师生参加。
讲座时间：2025年10月23日，10:00（北京时间）
讲座地点：材料学院220会议室
报告题目1：Development of Semiconductor Packaging Materials for High-Temperature Applications
摘要：The evolution of power electronics, wide-bandgap (WBG) semiconductors, and advanced wafer-level packaging technologies demands packaging materials capable of maintaining performance and reliability under high-temperature operating conditions. This talk presents recent developments in high-temperature semiconductor packaging materials focusing on die-attach layers, interconnects, and dielectric encapsulants.
Emphasis is placed on materials with enhanced thermal conductivity, mechanical integrity, and chemical stability, including rare-earth oxide dielectrics, Ag–Cu sintered interconnects, and advanced polymer–ceramic composites. The role of microstructural design, interfacial engineering, and diffusion control in improving thermal fatigue resistance and electrical insulation at elevated temperatures (≥300 °C) is discussed.
Experimental findings and modelling insights demonstrate how optimized interfaces and tailored compositions can suppress void formation, reduce thermomechanical stress, and enhance long-term reliability. Case studies on Ge-based and SiC device assemblies illustrate practical integration of these materials within wafer-level and system-in-package architectures.
Overall, the development of robust high-temperature packaging materials is essential to enable next-generation semiconductor devices for automotive, aerospace, and energy systems requiring extreme-environment operation.
报告题目2：High-k Rare Earth Oxides for Advanced Ge-Based MOS Devices in Wafer-Level Packaging
摘要2：The integration of high-k gate dielectrics on germanium (Ge) channels offers a promising route to enhance device performance in future wafer-level packaging technologies. This study investigates Sm₂O₃/Ge capacitor stacks fabricated by thermal oxidation and nitridation of sputtered metallic samarium in N₂O ambient. Structural and chemical analyses using XRD, Raman spectroscopy, and XPS confirm the formation of a trigonal-Sm₂O₃ phase and a stable interfacial layer containing Ge–O, Sm–O–Ge, and Ge–N species. The suppression of volatile GeO(g) through germanate (Sm–O–Ge) formation improves interface stability.
High-resolution TEM reveals an amorphous bilayer interface with physical oxide thickness between 4.25 and 6.91 nm. Electrical characterization demonstrates favorable band alignment with conduction and valence band offsets of 2.60 eV and 2.98 eV, respectively, resulting in a low leakage current density (~10⁻⁶ A cm⁻²) and high breakdown field (~13.3 MV cm⁻¹). A high dielectric constant (k ≈ 31) and equivalent oxide thickness (~0.75 nm) were achieved.
These findings highlight Sm₂O₃ as a potential high-k dielectric for Ge-based MOS devices, supporting the continued scaling and reliability of advanced wafer-level electronic packaging.
